Samsung Complements the Production of its Revolutionary 7nm EUV with Exceptional SAFE Ecosystem Solutions

SAN JOSE, Calif.–(BUSINESS WIRE)–Samsung Electronics Co., Ltd., a world leader in advanced semiconductor
technology, today announced the launch of its new commercial 7LPP, the
7-nanometer (nm) LPP (Low Power Plus) with extreme ultraviolet (EUV)
lithography technology for wafer production.

In conjunction with key Samsung Advanced Foundry Ecosystem (SAFE™)
partners, customers can now rely on a comprehensive set of design
collaterals to embark on Samsung’s revolutionary new process node
technology. Specifically, SAFE™ partners – Ansys, Arm, Cadence, Mentor,
SEMCO, Synopsys and VeriSilicon – have enabled critical Process Design
Kits (PDK), IP, Reference Flows, Advanced Packaging Solutions and Design
Services for customers to leverage the production-ready 7LPP process to
quickly and efficiently bring their next-generation chips to market.

“In collaboration with these ecosystem partners, we have established the
necessary design enablement collateral to facilitate customer design
starts on our differentiated 7LPP process,” said Jaehong Park, senior
vice president of Foundry Design Service Team at Samsung Electronics.
“The advanced design ecosystem solutions jointly developed by these
partners further enhance our customers’ user experience.”

Foundation and Advanced IP

SAFE™ partners from across the industry will be providing a broad range
of silicon verified IP to fully enable our customers to develop their
products quickly and reliably on this new platform. From
high-performance and high-density embedded memories and logic libraries
to the most advanced interface IP solutions including HBM2/2E, GDDR6,
DDR5, USB 3.1, PCI Express 5.0 and 112G SerDes, SAFE™ is ready to help
customers implement their designs on 7LPP EUV with significantly less
risk. Early design kits (DK) are now available for customer design
starts.

Design Tools & Flows

SAFE™ is also fully prepared for our customers to begin their designs
today using fully certified PDK tools and reference flows from our
partners at ANSYS, Cadence, Mentor and Synopsys. These partner tools and
flows have been fully qualified on the new 7LPP EUV process technology
and are ready to enable our customers today.

Advanced Packaging

As customer designs become ever more complicated, advanced packaging
plays a larger role in the design ecosystem. SAFE™ is ready to
complement the most complex customer designs on 7LPP EUV with a full
range of advanced packaging solutions including 2.5D silicon interposer
and new innovations like Embedded Passive Substrates.

Design Services

For 7LPP EUV, SAFE™ is also fully enabled with a complete range of
design services from partners like VeriSilicon. These partners are
thoroughly qualified on the 7LPP EUV platform and are ready to implement
customer designs today.

SAFE Quotes

Ansys

“Next generation electronics systems for HPC, 5G, AI and ADAS/Autonomous
applications are all converging on advanced process nodes and advanced
packaging technologies to keep pace with the increasing market demand
for power efficient, high-performing and reliable products at a lower
cost and with a smaller footprint. Through the SAFE™ initiative, we are
excited to continue our collaboration with Samsung Foundry on
leading-edge 7nm EUV process platform with best in class, certified
ANSYS semiconductor solutions to empower our customers to create robust
electronics systems faster while minimizing design costs and risk.”

– Vic Kulkarni, Vice President & Chief Strategist, Semiconductor
Business Unit

ARM

“Arm and Samsung Foundry’s collaboration through SAFE™ allows us to
accelerate time-to-market for chip designs in support of applications
spanning HPC to automotive. Arm’s Artisan Physical IP and POP IP
acceleration technology, which enables 3GHz+ compute performance on
Arm’s latest cores, leverages the EUV benefits available on Samsung’s
7nm LPP process technology. This gives our mutual customers the
opportunity to bring their most advanced, highest performing designs to
market faster than ever.”

– Gus Yeung, Vice President, General Manager & Fellow of Physical
Design Group

Cadence Design Systems

“By working with Samsung Foundry, we’ve been able to accelerate our
delivery of a certified full digital design flow, as well as a
custom/analog flow for our mutual customers at 7nm. In addition, we are
developing key IP for applications like high-performance computing, with
advanced technology memory interfaces and SerDes. Together, we can
provide the IP and full EDA tool sets that will let our customers bring
innovative designs to market much faster.”

– KT Moore, Vice President, Product Management

Mentor

“Samsung and Mentor have achieved another milestone in their
collaboration, bringing Samsung’s EUV-based 7nm offerings to
production-ready status for the ecosystem. Mentor is pleased to be
providing solutions in both design and manufacturing as a complete
bridge between Samsung’s SAFE™ ecosystem and their semiconductor
fabrication processes. This bridge is critical to ensure mutual
customers can best leverage Samsung Foundry’s process offerings.”

– Juan Rey, Vice President of Engineering for Calibre

SEMCO

“SEMCO has been a solid partner of Samsung for decades and a key
provider of versatile substrate options. In this new era of design where
silicon, memory and packaging converge, our partnership with Samsung
Foundry provides the market with unique solutions such as SPLP and RDL
interposer with EPS that optimize the total cost of ownership and give
each design a leading and competitive edge.”

– Gopal Garg, Vice President of Marketing

Synopsys

“Synopsys and Samsung have collaborated for more than 10 years to enable
designers to get the optimum quality of results with the highest
confidence using Synopsys tools and IP with Samsung Foundry process
technology. Synopsys’ full-flow EUV support for single-exposure-based
routing and via stapling combined with our broad portfolio of
silicon-proven Synopsys DesignWare® IP enables designers to achieve
optimal power, performance and area for their designs on Samsung
Foundry’s latest 7LPP EUV process. Through Samsung’s SAFE™ program,
designers can easily access Synopsys’ portfolio of high-quality IP and
comprehensive design flows for Synopsys’ market-leading EDA tools on
Samsung’s 7nm EUV process to differentiate their SoCs.”

– Deirdre Hanford, Co-General Manager for the Design Group

VeriSilicon

“Being one of the earlier adopters of 10LPP with volume production,
VeriSilicon taped out a chip on 7LPP EUV and saw significant advantages
in both performance and power consumption over 10LPP, and are ready to
provide design service for our customers. As a Silicon Platform Service
(SiPaaS®) company, VeriSilicon has taped out one chip a week based on
our Vivante GPU, vision image processor, Hantro video and ZSP-based
audio/voice SoC platforms for AIoT at the device, on the edge, and in
the cloud by mainly using Samsung FinFET and FD-SOI technologies among
others.”

– Wayne Dai, President and CEO

For more information about Samsung Foundry and the revolutionary new
7LPP EUV platform, please visit https://www.samsungfoundry.com.

About Samsung Electronics Co., Ltd.

Samsung inspires the world and shapes the future with transformative
ideas and technologies. The company is redefining the worlds of TVs,
smartphones, wearable devices, tablets, digital appliances, network
systems, and memory, system LSI, foundry and LED solutions. For the
latest news, please visit the Samsung Newsroom at http://news.samsung.com.

Contacts

Samsung Semiconductor, Inc.
Lisa Warren-Plungy, 408-544-5377
Lisa.plungy@samsung.com

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